2008/10/26

Paper: Visualizing Potential Parallelism in Sequential Programs

Graham Price, a fellow student at CU Boulder, will be presenting his paper on "Visualizing Potential Parallelism in Sequential Programs" at PACT in Toronto tomorrow (Monday 10/27).

This paper is related to my last post discussing how Parallelism is an Optimization and presents a high-performance visualization technique, based on Binary Decision Diagrams (BDDs) and Quad Trees, to allow programers to identify regions of code as candidates for coarse-grain parallelization.

More information on the paper can be found at the group's website http://ce.colorado.edu/core/

Visualizing Potential Parallelism in Sequential Programs
Graham D. Price, John Giacomoni, and Manish Vachharajani
The 17th International Conference on Parallel Architectures and Compilation Techniques (PACT), October 2008.


Abstract:
This paper presents ParaMeter, an interactive program analysis and visualization system for large traces. Using ParaMeter, a software developer can locate and analyze regions of code that may yield to parallelization efforts and to possibly extract performance from multicore hardware. The key contributions in the paper are (1) a method to use interactive visualization of traces to find and exploit parallelism, (2) interactive-speed visualization of large-scale trace dependencies, (3) interactive-speed visualization of code interactions, and (4) a BDD variable ordering for BDD-compressed traces that results in fast visualization, fast analysis, and good compression. ParaMeter's effectiveness is demonstrated by finding and exploiting parallelism in 175.vpr. Measurements of ParaMeter's visualization algorithms show that they are up to seventy-five thousand times faster than prior approaches.

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